High-Performance Data Processing – Ideal for time-sensitive workloads such as trading algorithms, telemetry, and real-time decision systems
Cost-Effectiveness – Reprogrammable solutions that maximize long-term value and minimize total cost of ownership
Scalability and Flexibility – Customizable hardware architectures designed to adapt with evolving market and application needs
With algorithmic and high-frequency trading gaining rapid momentum in India and across the APAC region, the demand for ultra-low latency, high-throughput systems is accelerating. In collaboration with Orthogone Technologies, we are proud to deliver regionally supported, FinTech-optimized FPGA platforms that combine Orthogone’s best-in-class IP cores with our deep hardware and embedded design expertise.
From embedded firmware and RTL design to ASIC prototyping and high-speed board development, we provide comprehensive engineering support to help you integrate, customize, and deploy ultra-low latency FPGA solutions with confidence
Regionally Supported, FinTech-optimized FPGA platforms
Integration of best-in-class IP cores from Orthogone Technologies
Deep hardware and embedded design expertise, high-speed board development
Comprehensive engineering support across embedded firmware, RTL design, ASIC prototyping
Customization and deployment of ultra-low latency FPGA solutions with confidence
Orthogone’s Ultra-Low Latency FPGA Framework, purpose-built for High-Frequency Trading (HFT), delivers exceptional speed by tightly integrating FPGA hardware with flexible software components. This seamless architecture enables ultra-fast communication between FPGA logic and external systems, achieving execution times in the nanosecond range ideal for latency-sensitive trading environments.
Hybrid solutions empower software developers to tap into the full potential of hardware acceleration, while still retaining the flexibility of traditional software development. This blend enables the creation of ultra-responsive trading systems that maintain simplicity in programming and
scalability for future growth
These IP cores are engineered to meet the evolving demands of the financial technology ecosystem, enabling the development of deterministic, high-speed, and scalable FPGA-based systems
High-Speed Ethernet with Flexibility and Scalability
ULL TCP/IP and UDP/IP Offload Engines provide:
ULL TCP/IP and UDP/IP Offload Engines provide:
FPGAs offer unmatched speed, flexibility, and parallel processing power, making them ideal for real-time, high-performance computing.
Parallel processing enables faster execution in data-heavy environments.
Tailor the chip to your application with full flexibility.
Ideal for real-time systems like video processing and communication.
Optimized design lowers power consumption for embedded applications.
How to Start with FPGA?
Learn FPGA Development →
The ULL FPGA Framework Development Kit (FDK) from Orthogone offers a full set of IP cores, an integrated FPGA development environment, and an all-encompassing software framework.
A full range of ultra-low latency FPGA IP cores for high-speed applications.
Ready-to-use specialized IP cores simplify the creation of key trading solutions, from tick-to-trade and order routing to risk checks and exchange connections.
An integrated FPGA development environment from start to finish
A robust FPGA development platform, of fering design scripts, comprehensive simulation test benches, and an AMD Alveo x3522pv reference design, enables users to quickly build a diverse range of FPGA applications.
A powerful software framework
A full set of Linux drivers,libraries, APIs, and utility tools is a vailable to streamline and speed up project development. Our Hybrid ULL FPGA Framework enables complete RTL implementation, supporting Layers 2, 3, and 4 protocols, such as ARP, IPv4, ICMP,TCP, and UDP.
Mettlesemi, in strategic partnership with Orthogone Technologies, delivers custom, regionally supported, ultra-low latency FPGA solutions tailored for High-Frequency Trading (HFT) and FinTech applications in India and the APAC region. This collaboration combines Orthogone’s industry-leading ULL IP cores with Mettlesemi’s proven expertise in FPGA and ASIC design, embedded systems, and high-speed hardware development. As an Authorized Reseller and Implementation Partner, Mettlesemi offers end-to-end support—from customization to integration—empowering financial institutions to deploy high-performance, scalable, and cost-effective computing platforms.
Explore our detailed datasheets to learn how these solutions meet the demands of mission-critical, time-sensitive financial environments.
ULL FPGA Framework offers hybrid solutions. Harness the combined power of
FPGA speed and software flexibility
IP Core can support full wire line speed with a 64-byte packet length & back-to-back or mixed length traffic with no loss
Download PDF »Enable ultra-low latency data transmission over 10Gbps Ethernet, reduce CPU load & boost performance
Download PDF »ULL PCIe DMA Controller Ultra-low latency DMA engine for fast, efficient PCIe data transfer with minimal resource usage
Download PDF »25G Ethernet MAC and PCS + RS-FEC High-speed 25G Ethernet core with MAC, PCS, and RS-FEC for reliable, low-latency data transmission
Download PDF »1G Ultra-Low Latency Ethernet MAC & PCS offers high-speed 1Gbps Ethernet with minimal latency, ideal for time-critical FPGA applications
Download PDF »We offer flexible pricing models tailored to your specific needs and preferred platforms. Whether you’re looking for project-based, site-wide, annual, or card-based licensing, we can customize a solution that fits your goals and budget.
Reach out to us today to explore the best option for your requirements.
Contact: crm@mettlesemi.com
The ULL FPGA framework is a high-performance FPGA and software solution specifically designed for ultra-low latency networking applications and primarily for high-frequency trading (HFT) applications.
The ULL FPGA Framework is a cutting-edge solution designed to meet the demands of ultra-low latency networking environments, with a special focus on high-frequency trading (HFT) systems. It seamlessly blends the raw processing power of FPGA hardware with the flexibility of software components, allowing businesses to build and deploy complex applications that can process massive volumes of data in real-time with near-zero latency. This framework empowers developers to quickly create a wide range of FPGA-based applications, giving them a strong competitive edge in markets where speed and responsiveness are critical. Its hybrid architecture ensures smooth integration into existing infrastructures, while offering scalability to handle increasing data loads and adaptability to keep up with rapidly evolving market conditions. Additionally, the ULL FPGA Framework supports a broad variety of hardware and software platforms, ensuring compatibility and ease of deployment. With ongoing expert support and performance optimization, the framework helps maintain long-term efficiency and relevance, making it an ideal choice for businesses aiming to stay agile and competitive in dynamic trading environments.
Blazing-Fast Ethernet for Mission-Critical Performance
Ultra-Low Latency 10G Ethernet MAC delivers unmatched speed, minimal gate usage, and superior reliability for high-performance applications.
Experience Ultra-Low Latency, Maximum Efficiency, and Seamless Scalability. The Ultra-Low Latency 10G Ethernet MAC and PCS IP core is built for applications that demand real-time performance without compromise. Designed with advanced techniques, it achieves industry-leading low gate count utilization and ultra-fast response times.
It supports full line-rate transmission with 64-byte packet lengths, ensures no packet loss with back-to-back or mixed traffic, and offers a flexible user interface. Enhanced with Deficit Idle Counter (DIC) for efficient gap control, real-time FCS computation and detection, and seamless compatibility with Orthogone’s 10G TCP/UDP IP core—this solution is optimized for engineers who need both performance and scalability in one powerful package.
EXPERIENCE SEAMLESS NETWORK CONNECTIVITY WITH THE LATEST FPGA-ENABLED NETWORK.
High-performance TCP and UDP IP offload engine cores offer a reliable, ultra-low-latency solution for financial and network applications. They address the data center industry’s growing need for throughput and hardware acceleration and provide network protocol offload for applications such as financial data processing, reprogrammable Smart NICs, and high-performance computing. Three FPGA IP core versions are available through standard licensing options, including TCP/IP Offload Engine (ToE), UDP/IP Offload Engine, and a version supporting both TCP/IP and UDP/IP protocols offload.
Easily integrated with innovative technologies such as our ultra-low-latency Ethernet MAC PCS and PCIe DMA controllers, these cores radically change the way we think about speed and efficiency.
The ULL PCIe DMA Controller enables high-speed bidirectional data transfer between the host CPU and FPGA through a PCIe interface, with a round-trip time of just 585ns. Featuring configurable build-time parameters, this IP core allows users to optimize their designs for maximum resource efficiency without sacrificing latency performance.
This IP core is highly parametrizable, allowing configuration of the number of channels, number of queues per channel, memory size for each queue, and AXI-4 Stream interface options, including bus width and synchronous/asynchronous operation relative to the PCIe clock. It is fully integrated with AMD/Xilinx PCIe Endpoint (up to Gen 4 x8) and offers seamless integration with Orthogone’s TCP/IP and UDP/IP network stacks through standard AXI-4 streaming interfaces. Designed for efficient FPGA implementation, it consumes minimal resources while maintaining high timing margins on -2 and -3 Xilinx/AMD UltraScale+ FPGAs. Optimized for ultra-low latency, kernel-bypass Linux applications, it features a polling and ring buffer DMA architecture. A Linux kernel module is included in standard delivery packages (rpm, deb), along with a driver for automatic PCIe card detection to enable quick evaluations. The provided library API simplifies buffer creation, transmission, and reception.
The 25G Ethernet MAC & PCS + RS-FEC core delivers ultra-low latency and efficient performance, fully compliant with IEEE802.3by-2016 and 25/50G Ethernet Consortium standards. It supports full wire-speed data transfer and includes built-in RS-FEC with bypass options for maximum flexibility.
The 25G Ethernet MAC & PCS + RS-FEC IP core is a high-performance solution compliant with IEEE802.3by-2016 and 25/50G Ethernet Consortium specifications. Built with advanced design techniques, the core achieves exceptional low gate count utilization and optimized latency, making it suitable for a wide range of applications. It supports full wire-speed operation with 64-byte packets and handles back-to-back or mixed-length traffic, including jumbo frames, without packet loss. An integrated Reed-Solomon Forward Error Correction (RS-FEC) RS(528, 514, 10) engine ensures robust data integrity, with options for FEC and error correction bypass to suit different system needs. Additionally, a variant of the core without RS-FEC is available, offering greater design flexibility based on application requirements.
Ultra-Low Latency 1G Ethernet MAC & PCS An advanced, low gate-count IP core designed for latency-critical Ethernet applications, offering full-speed performance and reliable packet handling for a wide range of network scenarios.
The Ultra-Low Latency 1G Ethernet MAC and PCS is an industry-leading IP core tailored for high-performance, latency-sensitive Ethernet applications. Engineered with optimized design techniques, it delivers outstanding gate count efficiency while achieving ultra-low latency performance. Supporting full wire line speed with 64-byte packets, it handles back-to-back and mixed-length traffic — including jumbo frames — without any packet loss. With a robust set of standard and advanced features, this core is ideal for a broad spectrum of networking use cases demanding speed, precision, and reliability.