Peripheral Verification of I2C Master with UVM Framework

This paper describes how the I2C peripheral verification is done by making use of the UVM framework. It explains how the environment is built by using the available VIP of I2C and the DUT and also explains how the communication is done between the DUT and the VIP using AXI4-Lite bus interface.

It explains the flow of the process that is taking place between the DUT and the VIP with the help of the bus interface. This paper also explains the different modes of the I2C along with their frequencies and gives the information about the formulae used to calculate the values of SCL and Prescaler clocks.

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